Basic Electronics
1. Introduction
2. Analogue
2.1 Semiconductors (diodes, BJT, FET)
2.2 Operational amplifiers
2.3 Filters (pole, orders zeros)
2.4 Mathematical operation using OPAMPs
3. Power Supplies
3.1 Linear
3.2 Switching
4. Digital
4.1 Number systems and arithmetic’s, conversion.
4.2 Binary addition, subtraction, multiplication, division.
4.3 Boolean algebra, Karnauugh maps and logical functions minimization.
4.4 Logic gates, NOT, AND, OR, XOR.
4.5 Flip-flops, timing characteristics.
4.6 Registers
4.7 Counters
4.8 Multiplexers
4.9 Decoders
4.10 Logical gates physical implementation in CMOS technology.
4.11 State machine design
4.12 Final State Machine (FSM)
4.13 Control Units using FSM

Microprocessors/Microcontrollers
5.1 ROM (EEPROM, OTP, FLASH)
5.2 RAM (Static, Dynamic)
5.3 Harvard and fon Newman architecture
5.4 Assembler language
5.5 Interfacing peripheral devices
5.6 ADC/DAC, sampling frequency
5.7 Memory mapping, I/O mapping
5.8 Measurement techniques
5.9 Motorola CPU08
5.9.1 Architecture, functional description
5.9.2 Configuration
5.9.3 Registers, stack
5.9.4 Addressing modes
5.9.5 Instruction set
5.10 Complete project development cycle using MC68HC908JL3
5.10.1 Temperature and pressure measurement
5.10.2 Interfacing 7 segment LED display
5.10.3 Keyboard interfacing and debouncing
5.11 Programming Motorola CPU08 using C language
5.11.1 Initialization
5.11.2 Program structure and operators
5.12 Bit manipulation techniques
6. Communication Interfaces
6.1 RS232
6.2 RS485
6.3 Centronics
6.4 High speed interfaces (Ethernet, USB, CAN IEEE-1394)

FPGA/CPLD
7.1 Internal structure
7.2 Macrocells, usable gates
7.3 Configuration, daisy chain
7.4 I/O standards
7.5 Schematic design entry
7.6 Synthesis
7.7 Functional simulation
7.8 Design implementation
7.9 Timing simulation
7.10 Programming using JTAG interface
7.11 Boundary scan, security

VHDL
8.1 VHDL Overview
8.1.1 VHDL Modeling Concepts
8.1.2 Analysis and Execution
8.1.3 Lexical elements: comments, identifiers, numbers, characters, entity, architecture, package, library
8.2 Scalar Types
8.2.1 Data Objects
8.2.2 Constant
8.2.3 Variable
8.2.4 Type declaration
8.3 Enumerated Types
8.4 Type Classification
8.5 Attributes
8.6 Expressions
8.7 Sequential Statements
8.7.1 Signal Assignment within a process
8.7.2 The Process Statement
8.7.3 The Assert statement
8.7.4 Sequential Statements: if, case, null, loop, wait
8.8 Composite Data Types and operations
8.8.1 Arrays
8.8.2 Examples of Array Declarations
8.8.3 Record
8.9 Entity and Architecture
8.9.1 Entity declaration
8.9.2 Architecture declaration
8.9.3 Signal declaration
8.9.4 Components Declaration
8.9.5 Components Instantiations
8.10 Behavioral Descriptions
8.10.1 Signal Assignment
8.10.2 Signal Attributes
8.10.3 Delay Mechanisms
8.10.4 Process Statement
8.10.5 Wait Statements
8.10.6 Concurrent Signal Assignments
8.10.7 Passive Processes
8.10.8 Structural Descriptions
8.10.9 Procedures and Functions
8.10.10 Package and Package Body Declaration
8.10.11 Port Maps

Xilinx/ASIC
9. Xilinx Foundation ISE Design Flow
9.1 Schematic Entry
9.2 VHDL modules
9.3 Constrain Editor
9.4 Place and route
9.5 Floor Planner
9.6 ModelSim Simulation
10. Testing digital design
10.1 Testing Methodologies
10.2 Creating Testbenches
10.3 Response Evaluation
11. ASIC Design Methodologies
11.1 Typical Design Flow
11.2 Specification and RTL Coding
11.3 Simulation and Constrains
11.4 Placement, Routing and Verification